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HONEYWELL 51303940-150

HONEYWELL 51303940-150

HONEYWELL 51303940-150風(fēng)扇,培訓(xùn)教程閃存板上有高達(dá)1MB的閃存。閃存的工作原理類似EPROM,但可以通過軟件擦除和重新編程。其組織形式為32位寬,但對于處理器來說,它看起來是64位寬。映射于讀取可以是任何大小,包括突發(fā)傳輸,但是無論為傳輸指定的大小如何,寫入總是32位寬。因此,軟件應(yīng)僅使用32位寫傳輸。這段記憶由總線開關(guān)和內(nèi)存大小、訪問時(shí)間和寫入控制可通過ROM控制寄存器(R...

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HONEYWELL 51303940-150

    HONEYWELL 51303940-150風(fēng)扇,培訓(xùn)教程

    閃存板上有高達(dá)1MB的閃存。閃存的工作原理類似EPROM,但可以通過軟件擦除和重新編程。其組織形式為32位寬,但對于處理器來說,它看起來是64位寬。映射于讀取可以是任何大小,包括突發(fā)傳輸,但是無論為傳輸指定的大小如何,寫入總是32位寬。因此,軟件應(yīng)僅使用32位寫傳輸。這段記憶由總線開關(guān)和內(nèi)存大小、訪問時(shí)間和寫入控制可通過ROM控制寄存器(ROMCR)編程啟用功能在總線開關(guān)中。

    51303940-150 -1.jpg

    HONEYWELL 51303940-150風(fēng)扇可以從處理器總線訪問閃存只有無法從本地外圍總線或VMEbus訪問。車載DRAMMVME197LE板載DRAM(2組32MB內(nèi)存,一個(gè)可選)已安裝)使用1M x 4設(shè)備,大小為32MB,配置為256位寬的DRAM是四路交錯(cuò)的,以有效支持緩存突發(fā)周期。DRAM由DCAM和ECDM以及map控制DCAM中的解碼器可以通過中的I2Cbus接口進(jìn)行編程ECDM可適應(yīng)不同的基址和大小。本地外圍總線重置不會(huì)禁用板載DRAM。參考DCAM和MVME197LE、MVME197DP和MVME197SP Single中的ECDM章節(jié)板機(jī)程序員詳細(xì)編程參考指南信息電池備份RAM和時(shí)鐘MVME197LE上使用了MK48T08 RAM和時(shí)鐘芯片。這個(gè)芯片提供時(shí)鐘、振蕩器、晶體、電源故障檢測、內(nèi)存寫保護(hù)、8KB RAM和一個(gè)28針封裝中的電池。時(shí)鐘

    以BCD 24小時(shí)格式提供秒、分鐘、小時(shí)、天、日期、月份和年份總體安排28、29、(閏年)和30天月份的修正為自動(dòng)生成。時(shí)鐘不會(huì)產(chǎn)生中斷。MK48T08是一個(gè)8位設(shè)備;但是,PCCCIP2提供的接口支持對MK48T08的8位、16位和32位訪問。請參閱中的PCCCIP2章MVME197LE、MVME197DP和MVME197SP單板計(jì)算機(jī)有關(guān)詳細(xì)信息,請參閱程序員參考指南和MK48T08數(shù)據(jù)表編程信息

    Flash Memory

    Up to 1MB of flash memory is available on the board. Flash memory works like

    EPROM, but can be erased and reprogrammed by software. It is organized as

    32 bits wide, but to the processor it looks as 64 bits wide. It is mapped at

    location $FF800000. Reads can be of any size, including burst transfers, but

    writes are always 32 bits wide, regardless of the size specified for the transfer.

    For this reason, software should only use 32-bit write transfers. This memory

    is controlled by the BusSwitch, and the memory size, access time, and write

    enable capability can be programmed via the ROM Control Register (ROMCR)

    in the BusSwitch. The flash memory can be accessed from the processor bus

    only. It is not accessible from the local peripheral bus or VMEbus.

    Onboard DRAM

    The MVME197LE onboard DRAM (2 banks of 32MB memory, one optionally

    installed) is sized at 32MB using 1M x 4 devices and configured as 256 bits

    wide. The DRAM is four-way interleaved to efficiently support cache burst

    cycles. The DRAM is controlled by the DCAM and ECDM, and the map

    decoders in the DCAM can be programmed through the I2Cbus interface in

    the ECDM to accommodate different base address(es) and sizes. The onboard DRAM is not disabled by a local peripheral bus reset. Refer to the DCAM and

    ECDM chapters in the MVME197LE, MVME197DP, and MVME197SP Single

    Board Computers Programmer’s Reference Guide for detailed programming

    information.Battery Backup RAM and Clock

    The MK48T08 RAM and clock chip is used on the MVME197LE. This chip

    provides a time of day clock, oscillator, crystal, power fail detection, memory

    write protection, 8KB of RAM, and a battery in one 28-pin package. The clock

    provides seconds, minutes, hours, day, date, month, and year in BCD 24-hour

    format. Corrections for 28-, 29-, (leap year) and 30-day months are

    automatically made. No interrupts are generated by the clock. The MK48T08

    is an 8-bit device; however the interface provided by the PCCchip2 supports

    8-, 16-, and 32-bit accesses to the MK48T08. Refer to the PCCchip2 chapter in

    the MVME197LE, MVME197DP, and MVME197SP Single Board Computers

    Programmer’s Reference Guide and to the MK48T08 data sheet for detailed

    programming information


    品牌:HONEYWELL

    型號(hào):51303940-150

    產(chǎn)地:美國

    質(zhì)保:365天

    成色:全新/二手

    發(fā)貨方式:快遞發(fā)貨


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