MVME167-004A工控備件機(jī)器人模塊
Hidrom 1 1756HP-TIME冗余控制器實(shí)施V1.00.02第頁(yè)簡(jiǎn)介WALLLOCK紀(jì)律設(shè)置系統(tǒng)值（SSV）O RSLOGIX V16 O RSLOGX V19精確時(shí)間協(xié)議簡(jiǎn)介本文件用于描述冗余ControlLogix系統(tǒng)中時(shí)間同步（使用1756HPTIME模塊）的實(shí)現(xiàn)。目前，用戶在實(shí)施冗余控制系統(tǒng)時(shí)可以使用RSLogix v16或RSLogix v19（其中v19支持精確時(shí)間協(xié)議或PTP）。將對(duì)同步控制器以及事件序列（SOE）解決方案進(jìn)行說(shuō)明。如果用戶有任何問(wèn)題或疑問(wèn)，請(qǐng)發(fā)送電子郵件：[email protected]羅克韋爾自動(dòng)化Hidrom 3 WALLCLOCK DISCIPLINE設(shè)置系統(tǒng)值（SSV）將使用以下冗余PLC架構(gòu)作為示例：RSLogix v16用戶可以通過(guò)向其寫(xiě)入當(dāng)前UTC值來(lái)設(shè)置墻上時(shí)鐘。由于CPU與1756HP-TIME模塊位于同一機(jī)架中，UTC偏移不能用于調(diào)整時(shí)鐘，因?yàn)楸镜睾瓦h(yuǎn)程機(jī)架的CST不同。PPS位可用于每秒調(diào)節(jié)時(shí)鐘，如下所示：因此，在每秒鐘開(kāi)始時(shí)，SSV指令將使用從1756HP-TIME模塊接收的UTC值調(diào)節(jié)時(shí)鐘。TE：掛鐘時(shí)間只能與遠(yuǎn)程機(jī)架的RPI+1756HP-time模塊的RPI一樣精確。例如，如果遠(yuǎn)程機(jī)架RPI為20ms，而1756HP-TIME模塊的RPI為10ms，則最大掛鐘時(shí)間誤差將為30ms。RSLogix v19如果用戶使用CIPSync（精確時(shí)間協(xié)議–PTP），則RSLogix v16方法也適用于RSLogix V109。羅克韋爾自動(dòng)化Hidrom 4精確時(shí)間協(xié)議（PTP）將使用以下冗余PLC架構(gòu)作為示例：RSLogix v9使用CIPSync時(shí)，用戶必須啟用3個(gè)選項(xiàng)。這將允許1756HP-TIME模塊在不需要任何階梯的情況下同步控制器（注意，使用PTP時(shí)時(shí)間精度更好）：1。將1756HP-TIME模塊設(shè)置為在配置圖像UDT或AOP中輸出PTP：羅克韋爾自動(dòng)化Hidrom 5 TE：如果用戶使用1756HP_TIME模塊的主要固件版本2，則可以從附加配置文件（AOP）中設(shè)置所有參數(shù)，并且圖像結(jié)構(gòu)化時(shí)需要UDT。2.設(shè)置以太網(wǎng)橋模塊（EN2 EN2TR等）以支持CIPSync:3.設(shè)置Logix控制器以啟用時(shí)間同步：羅克韋爾自動(dòng)化Hidrom 6以太網(wǎng)橋?qū)⒂米鬟吔鐣r(shí)鐘（以太網(wǎng)上的PTP從屬設(shè)備和控制總線上的PTP-主設(shè)備）。因此，Logix控制器將與以太網(wǎng)橋同步，而以太網(wǎng)橋又將與1756HP-TIME模塊同步。Logix控制器與TIME模塊同步后，用戶可以通過(guò)選擇控制器AOP的DateTime選項(xiàng)卡中的Advanced（高級(jí)）按鈕來(lái)確認(rèn)時(shí)間精度：Rockwell Automation Hidrom 7 SEQUENCE of EVENTS（SOE）CST UTC以下冗余PLC架構(gòu)將用作示例：RSLogix v16在冗余系統(tǒng)中執(zhí)行事件序列（SOE為每個(gè)機(jī)架添加1756HP-TIME模塊，以便為每個(gè)SOE模塊提供CST和UTC對(duì)。
Rockwell Automation Hiprom 1 1756HP-TIME REDUNDANT CONTROLLER IMPLEMENTATION V1.00.02 Section Page INTRODUCTION WALLCLOCK DISCIPLINE SET SYSTEM VALUE (SSV) O RSLOGIX V16 O RSLOGIX V19 PRECISION TIME PROTOCOL (PTP) O RSLOGIX V19 SEQUENCE OF EVENTS (SOE) CST UTC O RSLOGIX V16 O RSLOGIX V19 PRECISION TIME PROTOCOL (PTP) O RSLOGIX V19 2 3 3 3 3 4 4 7 7 7 9 9 9 Rockwell Automation Hiprom 2 INTRODUCTION This document serves to describe the implementation of time synchronization (using the 1756HPTIME module) in a redundant ControlLogix system. Currently the user can either use RSLogix v16 or RSLogix v19 when implementing the redundant control system (where v19 supports the Precision Time Protocol or PTP). An explanation will be given on synchronizing controllers as well as doing sequence of events (SOE) solutions. If the user has any questions or queries please email: [email protected] Rockwell Automation Hiprom 3 WALLCLOCK DISCIPLINE Set System Value (SSV) The following redundant PLC architecture will be used as an example: RSLogix v16 The user can set the wallclock by writing the current UTC value to it. Because the CPU is t in the same rack as the 1756HP-TIME module the UTC offset cant be used to discipline the clock because the CST of the local and remote racks are different. The PPS bit can be used to discipline the clock every second as shown below: Thus at the beginning of every second the SSV instruction will discipline the clock by using the UTC value received from the 1756HP-TIME module. TE: The wallclock time will only be as accurate as the RPI of the remote rack + the RPI of the 1756HP-TIME module. For example if the remote rack RPI is 20ms and the 1756HP-TIME module’s RPI is 10ms the max wallclock time error will be 30ms. RSLogix v19 If the user is t using CIPSync (Precision Time Protocol – PTP) then the RSLogix v16 method will also apply to RSLogix v19. Rockwell Automation Hiprom 4 Precision Time Protocol (PTP) The following redundant PLC architecture will be used as an example: RSLogix v19 When using CIPSync the user must enable 3 options. This will allow the 1756HP-TIME module to synchronize the Controllers without any ladder needed (te that the time accuracy is much better when PTP is being used): 1. Set the 1756HP-TIME module to output PTP in either the config image UDT or AOP: Rockwell Automation Hiprom 5 TE: If the user is using major firmware revision 2 of the 1756HP-TIME module all parameters can be set from the Add-on Profile (AOP) and UDTs are required as the images are structured. 2. Set the Ethernet bridge module (EN2 EN2TR etc.) to support CIPSync: 3. Set the Logix Controller to enable Time Synchronization: Rockwell Automation Hiprom 6 The Ethernet Bridge will serve as a boundary clock (PTP slave on Ethernet and PTP master on ControlBus). Thus the Logix Controller will synchronize to the Ethernet Bridge which in turn will synchronize to the 1756HP-TIME module. Once the Logix Controller has synchronized to the TIME module the user can confirm the time accuracy by selecting the Advanced button in the DateTime tab of the Controller AOP: Rockwell Automation Hiprom 7 SEQUENCE OF EVENTS (SOE) CST UTC The following redundant PLC architecture will be used as an example: RSLogix v16 When doing sequence of events (SOE) in a redundant system the user will need to add a 1756HP-TIME module per rack as to provide the CST and UTC pairs to each SOE module.
