RELIANCE 45C341模擬輸入卡
從看門狗計(jì)時(shí)器讀取一天中的時(shí)間有兩種方法。首先是通過(guò)將Te位（命令寄存器的位7）設(shè)置為邏輯零（0），然后讀取時(shí)間寄存器的內(nèi)容，停止外部時(shí)間寄存器跟蹤內(nèi)部時(shí)間寄存器。使用這種技術(shù)可以消除在讀取過(guò)程中時(shí)間發(fā)生變化的可能性。在讀取結(jié)束時(shí)，Te位被設(shè)置為邏輯1，允許外部時(shí)間寄存器恢復(fù)跟蹤內(nèi)部時(shí)間寄存器。當(dāng)外部時(shí)間寄存器停止時(shí)，內(nèi)部時(shí)間寄存器繼續(xù)計(jì)時(shí)，因此不會(huì)丟失時(shí)間。這是推薦的方法。從看門狗計(jì)時(shí)器讀取時(shí)間的第二種技術(shù)是讀取外部時(shí)間寄存器，而不停止內(nèi)部寄存器的跟蹤。不建議這樣做，因?yàn)樵谧x取過(guò)程中可能會(huì)更新寄存器，從而導(dǎo)致讀取錯(cuò)誤數(shù)據(jù)。
There are two techniques for reading the Time of Day from the Watchdog Timer. The first is to halt the external Time of Day registers from tracking the internal Time of Day registers by setting the Te bit (Bit 7 of the Command Register) to a logic zero (0), then reading the contents of the Time of Day registers. Using this technique eliminates the chance of the Time of Day changing while the read is taking place. At the end of the read, the Te bit is set to a logic one (1) allowing the external Time of Day registers to resume tracking the internal Time of Day Registers. No time is lost as the internal Time of Day Registers continue to keep time while the external Time of Day registers are halted. This is the recommended method. The second technique for reading the Time of Day from the Watchdog Timer is to read the external Time of Day registers without halting the tracking of the internal Registers. This is not recommended as the registers may be updated while the reading is taking place, resulting in erroneous data being read.
