BENTLY 3500/70M速度監(jiān)測器
PCI設(shè)備PCI設(shè)備在I/O和/或內(nèi)存地址空間下完全配置。表E-2描述了VMIVME-7740上的PCI總線設(shè)備以及每個(gè)設(shè)備的配置頻譜。PCI總線包括三個(gè)物理地址空間。與ISA總線一樣，PCI總線支持內(nèi)存和I/O地址空間，但PCI總線包括一個(gè)額外的配置地址空間。該地址空間被定義為支持PCI總線硬件配置（有關(guān)配置地址空間的完整詳細(xì)信息，請參閱PCI總線規(guī)范）。PCI總線目標(biāo)需要在配置地址空間中實(shí)現(xiàn)基本地址寄存器以訪問內(nèi)部寄存器或功能。BIOS使用基本地址寄存器來確定設(shè)備在給定地址空間中需要多少空間，然后分配設(shè)備在該空間中的位置。此功能使PCI設(shè)備能夠位于內(nèi)存或I/O地址空間中。設(shè)備中斷定義PC/AT中斷定義VMIVME-7740上的中斷硬件實(shí)現(xiàn)是圍繞PC/AT架構(gòu)構(gòu)建的計(jì)算機(jī)的標(biāo)準(zhǔn)。PC/AT由IBM PC/XT體系結(jié)構(gòu)演變而來。
PCI Devices PCI devices are fully configured under I/O and/or Memory address space. Table E-2 describes the PCI bus devices that are on-board the VMIVME-7740 along with each device’s configuration spectrum. The PCI bus includes three physical address spaces. As with ISA bus, PCI bus supports Memory and I/O address space, but PCI bus includes an additional Configuration address space. This address space is defined to support PCI bus hardware configuration (refer to the PCI bus Specification for complete details on the configuration address space). PCI bus targets are required to implement Base Address registers in configuration address space to access internal registers or functions. The BIOS uses the Base Address register to determine how much space a device requires in a given address space and then assigns where in that space the device will reside. This functionality enables PCI devices to be located in either Memory or I/O address space.Device Interrupt Definition PC/AT Interrupt Definition The interrupt hardware implementation on the VMIVME-7740 is standard for computers built around the PC/AT architecture. The PC/AT evolved from the IBM PC/XT architecture.
