EMERSON 1C31232G03數(shù)字輸入模塊
電源監(jiān)控邏輯提供在板上，用于監(jiān)控來自LTC3288和LTC3146調(diào)節(jié)器的PGOOD信號，以確定電源輸出是否在容差范圍內(nèi)。如果任何電源發(fā)生故障，此邏輯將關(guān)閉電源以避免任何組件損壞。如果+5.0V電源在故障狀態(tài)下仍然正常，則平面紅色LED（PWR fail D9）將點(diǎn)亮，以指示電源故障狀態(tài)。4.12.3電源濾波和熔斷MVME7100上的每個(gè)開關(guān)電源輸入都將具有電感器，以減少反饋到+5.0V輸入的開關(guān)噪聲。LTC3828電源將各有一個(gè)10A保險(xiǎn)絲，以在部件故障時(shí)保護(hù)電源不受過電流影響。4.13時(shí)鐘分配時(shí)鐘功能生成并分配系統(tǒng)運(yùn)行所需的所有時(shí)鐘。PCI-E時(shí)鐘使用八輸出差分時(shí)鐘驅(qū)動(dòng)器生成。PCI/PCI-X總線時(shí)鐘由橋接芯片從PCI-E時(shí)鐘生成。使用單個(gè)振蕩器在設(shè)備附近生成單個(gè)設(shè)備所需的附加時(shí)鐘。有關(guān)時(shí)鐘分配，請參閱MVME7100單板計(jì)算機(jī)編程器參考手冊。
Power Supply Monitor Logic is provided on-board to monitor the PGOOD signal from the LTC3828 and LTC3416 regulators to determine if the power supply outputs are within tolerance. If any of the power supplies fail, this logic shuts off the power supplies to avoid any component damage. If the +5.0V power supply is still good during a fail condition, a planar red LED (PWR FAIL D9) is illuminated to indicate the power supply fail condition. 4.12.3 Power Supply Filtering and Fusing Each of the switching power supply inputs on the MVME7100 will have an inductor to reduce switching noise from being fed back onto the +5.0V input. The LTC3828 supplies will each have a 10A fuse to protect the supplies from over-current in case of component failure. 4.13 Clock Distribution The clock function generates and distributes all of the clocks required for system operation. The PCI-E clocks are generated using an eight output differential clock driver. The PCI/PCI-X bus clocks are generated by the bridge chips from the PCI-E clock. Additional clocks required by individual devices are generated near the devices using individual oscillators. For clock assignments, refer to the MVME7100 Single Board Computer Programmer’s Reference manual.
