EMERSON 1C31107G02數(shù)字輸入模塊
摩托羅拉程序員應該注意，英特爾處理器有一條完全獨立于內(nèi)存總線的I/O總線。本手冊中已盡一切努力通過引用I/O空間中的寄存器和邏輯實體（通過前綴I/O地址）來闡明這一點。因此，“I/O$140”處的寄存器與“$140”的寄存器不同，因為后者在內(nèi)存總線上，而前者在I/O總線上。?英特爾程序員應注意，本手冊中列出的地址使用的是線性“平面內(nèi)存”模型，而不是與英特爾實模式編程相關的舊段：偏移模型。因此，位于段：偏移地址C000:0的ROM芯片將在本手冊中列為地址$C000000。作為參考，這里有一些快速轉換公式：段：偏移到線性地址線性地址=（段×16）+偏移到段的線性地址：偏移段=（（線性地址÷65536）?余數(shù)）×4096偏移=余數(shù)×65536其中余數(shù)=（線性地址？65536）的小數(shù)部分
Motorola programmers should note that Intel processors have an I/O bus that
is completely independent from the memory bus. Every effort has been made in
the manual to clarify this by referring to registers and logical entities in I/O
space by prefixing I/O addresses as such. Thus, a register at “I/O $140” is not
the same as a register at “$140,” since the latter is on the memory bus while the
former is on the I/O bus.
? Intel programmers should note that addresses are listed in this manual using a
linear, “flat-memory” model rather than the old segment:offset model
associated with Intel Real Mode programming. Thus, a ROM chip at a
segment:offset address of C000:0 will be listed in this manual as being at
address $C0000. For reference, here are some quick conversion formulas:
Segment:Offset to Linear Address
Linear Address = (Segment × 16) + Offset
Linear Address to Segment:Offset
Segment = ((Linear Address ÷ 65536) ? remainder) × 4096
Offset = remainder × 65536
Where remainder = the fractional part of (Linear Address ÷ 65536)
