UFC921A101 3BHE024855R0101電源模塊，ABB怎么使用
VMEbus主界面由VMEchip提供。根據(jù)VMEbus地址，MVME147主機(jī)接口可以是A32/D32、A24/D16或A16/D16。當(dāng)MC68030需要VMEbus進(jìn)行讀、寫(xiě)、讀-修改-寫(xiě)、，或中斷確認(rèn)周期，它請(qǐng)求VMEchip獲取公共汽車(chē)主控權(quán)。VMEchip請(qǐng)求總線，并在收到mastership，它根據(jù)
MC68030。當(dāng)從機(jī)響應(yīng)時(shí)，VMEchip會(huì)傳遞此消息信息發(fā)送至MC68030。
UFC921A101 3BHE024855R0101電源模塊VMEbus請(qǐng)求者VMEbus請(qǐng)求者用于獲取和放棄主控權(quán)VMEbus的。其操作受可編程軟件的影響VMEchip中的位。請(qǐng)求者在編程的當(dāng)電路板不是當(dāng)前VMEbus主電路板并且是以下之一時(shí)的電平發(fā)生以下情況：? MC68030執(zhí)行綁定的程序空間周期對(duì)于VMEbus。? MC68030執(zhí)行一個(gè)數(shù)據(jù)空間周期，該周期為VMEbus。? MC68030執(zhí)行一個(gè)IACK循環(huán)，該循環(huán)為VMEbus。
? MC68030設(shè)置VMEchip中的DWB位。? MC68030執(zhí)行“多地址RMC”循環(huán)為本地DRAM綁定，WAITRMC位設(shè)置在PCC。請(qǐng)求VMEbus主控權(quán)也受中的RONR位影響VMEchip LCSR。只要其中一個(gè)滿足以下條件：? MC68030正在執(zhí)行VMEbus循環(huán)。? RWD位在VMEchip中被清除，沒(méi)有其他VMEbus主機(jī)正在激活總線請(qǐng)求。? RNEVER位在VMEchip中設(shè)置。? DWB位在VMEchip中設(shè)置。? MC68030正在對(duì)VMEbus。
? MC68030正在完成從中開(kāi)始的RMC序列
本地DRAM，同時(shí)在PCC中設(shè)置WAITRMC位。
The VMEbus master interface is provided by the VMEchip.
Depending on the VMEbus address, the MVME147 master
interface may be A32/D32, A24/D16, or A16/D16. When the
MC68030 needs the VMEbus for a read, write, read-modify- write,
or interrupt acknowledge cycle, it requests the VMEchip to obtain
bus mastership. The VMEchip requests the bus and after it receives
mastership, it activates the VMEbus signals as requested by the
MC68030. When the slave responds, the VMEchip passes this
information to the MC68030.VMEbus Requester
The VMEbus requester is used to obtain and relinquish mastership
of the VMEbus. Its operation is affected by software programmable
bits in the VMEchip.
The requester requests VMEbus mastership at the programmed
level when the board is not the current VMEbus master and one of
the following happens:
? The MC68030 executes a program space cycle that is bound
for the VMEbus.
? The MC68030 executes a data space cycle that is bound for the
VMEbus.
? The MC68030 executes an IACK cycle that is bound for the
VMEbus.
? The MC68030 sets the DWB bit in the VMEchip.
? The MC68030 executes a “multiple address RMC” cycle that
is bound for the local DRAM and the WAITRMC bit is set in
the PCC.
Requesting VMEbus mastership is also affected by the RONR bit in
the VMEchip LCSR. The requester maintains VMEbus mastership as long as one of the
following conditions is met:
? The MC68030 is executing a VMEbus cycle.
? The RWD bit is cleared in the VMEchip and no other VMEbus
master is activating a bus request.
? The RNEVER bit is set in the VMEchip.
? The DWB bit is set in the VMEchip.
? The MC68030 is performing an RMC sequence to the
VMEbus.
? The MC68030 is finishing an RMC sequence that started in
local DRAM while the WAITRMC bit was set in the PCC.
