07KT98 GJR5253100R3160模塊，ABB數據庫
DMAC啟動模式DMAC有兩種啟動模式：直接啟動和命令啟動鏈接（分散-聚集）。
在直接模式下，數據地址指針和字節(jié)計數為加載到芯片中。
在命令鏈接模式下，數據地址和字節(jié)的表計數放在本地RAM中，并加載表的地址進入芯片。芯片遍歷地址和字節(jié)計數從本地RAM移動每個數據塊，如桌子命令支持分散-聚集操作鏈接。
07KT98 GJR5253100R3160模塊PCC可以DMA到/從本地DRAM和VMEbus內存只有任何其他訪問都會導致本地總線超時。DMAC運行狀態(tài)DMAC始終處于三種操作狀態(tài)之一：空閑狀態(tài)，表漫游狀態(tài)或數據傳輸狀態(tài)。DMA序列通過這三個取決于DMA控制寄存器的內容由微處理器初始化。空閑狀態(tài)
DMAC在空閑狀態(tài)下從復位開始。它處于空閑狀態(tài)狀態(tài)，直到DMAC啟用（DMAEN設置為1）。它返回到DMAC完成請求的操作時的空閑狀態(tài)（正常或有錯誤）。直到所有錯誤狀態(tài)位被清除，DMAEN再次設置為1。數據傳輸狀態(tài)當設置DMAEN時，DMAC直接進入數據傳輸狀態(tài)，除非設置了桌面漫游（TW）位。如果設置了TW，則DMAC表在進入數據傳輸狀態(tài)之前進行遍歷。在任何一種情況下，當進入數據傳輸狀態(tài)時，DMAC在本地DRAM和WD33C93（SCSI總線）之間移動數據接口控制器）。DMAC在本地DRAM中讀取/寫入數據
DMAC Initiation Mode
The DMAC has two initiation modes: direct and command
chaining (scatter-gather).
In the direct mode, the data address pointer and the byte count are
loaded into the chip.
In the command chaining mode, a table of data addresses and byte
counts is placed in local RAM and the address of the table is loaded
into the chip. The chip walks through the addresses and byte counts
from the local RAM to move each block of data as indicated by the
table. Scatter-gather operations are supported by command
chaining.
The PCC can DMA to/from local DRAM and VMEbus memory
only. Any other access results in a local bus time-out.
DMAC Operation States
The DMAC is always in one of three operational states: idle state,
table walk state, or data transfer state. The DMA sequences through
the three depending upon the contents of the DMA control register
which is initialized by the MPU.
Idle State
The DMAC starts out from reset in the idle state. It stays in the idle
state until the DMAC is enabled (DMAEN set to 1). It returns to the
idle state when the DMAC has completed the requested operations
(normally or with error). It does not leave the idle state again until
all error status bits are cleared and DMAEN is again set to 1.
Data Transfer State
When DMAEN is set, the DMAC goes directly to the data transfer
state unless the Table Walk (TW) bit is set. If TW is set, the DMAC
table walks before entering the data transfer state.
In either event, when the data transfer state is entered, the DMAC
moves data between local DRAM and the WD33C93 (SCSI bus
interface controller). The DMAC reads/writes data in local DRAM
