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140CPU31110處理器模塊

作者:xqt 發(fā)布時間:2022-07-05 17:20:43 次瀏覽

140CPU31110處理器模塊,SCHNEIDER參數(shù)說明看門狗定時器PCC包括看門狗定時器功能。當(dāng)由啟用時軟件,看門狗定時器可編程為重置模塊(如果是系統(tǒng)控制器)。每當(dāng)看門狗定時器超時時,故障指示燈點亮(除了BRDFAIL位在VMEchip中設(shè)置)??撮T狗定時器對滴答定時器1的輸出進行計數(shù)。如果看門狗定時器不會由編程內(nèi)的軟件重置滴答聲的數(shù)量,它超時。140CPU31110處理器模塊打印機接口PC

140CPU31110處理器模塊,SCHNEIDER參數(shù)說明

看門狗定時器PCC包括看門狗定時器功能。當(dāng)由啟用時軟件,看門狗定時器可編程為重置

模塊(如果是系統(tǒng)控制器)。每當(dāng)看門狗定時器超時時,故障指示燈點亮(除了BRDFAIL位在VMEchip中設(shè)置)。看門狗定時器對滴答定時器1的輸出進行計數(shù)。如果看門狗定時器不會由編程內(nèi)的軟件重置滴答聲的數(shù)量,它超時。

140CPU31110.jpg

140CPU31110 -3.jpg

140CPU31110處理器模塊打印機接口PCC具有與Centronics兼容的打印機接口。打印機當(dāng)MC68030準(zhǔn)備好接收數(shù)據(jù)或出現(xiàn)故障。中斷級別可編程,并提供請求時的狀態(tài)/ID向量??刂坪蜖顟B(tài)寄存器PCC具有輸入和輸出信號線,用于控制各種MVME147上的功能。DRAM有控制線奇偶校驗啟用、奇偶校驗測試和奇偶校驗錯誤狀態(tài)、VMEbus映射選擇、多地址RMC模式和LANCE地址選擇。重置和中止開關(guān)PCC提供重置和中止開關(guān)接口。復(fù)位開關(guān)信號被解除抖動,當(dāng)其啟用時,它將導(dǎo)致復(fù)位輸出信號。復(fù)位開關(guān)可以啟用/禁用通過軟件。

中止開關(guān)信號被解除抖動并發(fā)送到7級斷續(xù)器。啟用時,中止開關(guān)導(dǎo)致7級中斷至MC68030。中斷器返回狀態(tài)/ID請求時的矢量??梢詥⒂?禁用中止開關(guān)通過軟件。通電復(fù)位當(dāng)PCC接收到通電復(fù)位信號時,它會生成一個復(fù)位信號輸出信號并在控制寄存器中設(shè)置通電位。這個

通電位可由軟件用于確定何時發(fā)生通電重置。

Watchdog Timer

The PCC includes a watchdog timer function. When enabled by

software, the watchdog timer may be programmed to reset the

module if it is system controller. Whenever the watchdog timer

times out, the FAIL LED is lit (in addition to when the BRDFAIL bit

is set in the VMEchip).

The watchdog timer counts outputs from tick timer 1. If the

watchdog timer is not reset by software within the programmed

number of ticks, it times out. Printer Interface

The PCC has a Centronics compatible printer interface. The printer

interface interrupts the MC68030 when it is ready for data or when

a fault occurs. The interrupt level is programmable and it provides

a status/ID vector when requested.

Control and Status Registers

The PCC has input and output signal lines for controlling various

functions on the MVME147. There are control lines for DRAM

parity enable, parity test and parity error status, VMEbus map

select, multiple address RMC mode, and LANCE address select.

RESET and ABORT Switches

The PCC provides the RESET and ABORT switch interface.

The RESET switch signal is debounced and when it is enabled, it

causes a reset out signal. The RESET switch can be enabled/disabled

by software.

The ABORT switch signal is debounced and sent to the level 7

interrupter. When it is enabled, the ABORT switch causes a level 7

interrupt to the MC68030. The interrupter returns a status/ID

vector when requested. The ABORT switch can be enabled/disabled

by software.

Power-Up Reset

When the PCC receives a power-up reset signal, it generates a reset

out signal and sets the power-up bit in the control register. The

power-up bit can be used by software to determine when a powerup reset has occurred. 


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