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VMIVME-7807自動(dòng)化卡件

作者:xqt 發(fā)布時(shí)間:2022-07-05 15:49:54 次瀏覽

VMIVME-7807自動(dòng)化卡件,GE使用方法教程位設(shè)置和清除指令不應(yīng)用于此控制寄存器。因?yàn)橹袛啾粚?寫(xiě)入狀態(tài)位,狀態(tài)位為1至指示掛起的中斷,讀-修改-寫(xiě)序列可能清除掛起的中斷。這些位對(duì)滴答定時(shí)器生成的中斷電平進(jìn)行編程。這些位編程打印機(jī)生成的中斷級(jí)別。級(jí)別0不生成中斷。這些位通過(guò)重置。位3當(dāng)該位為高位時(shí),中斷被啟用。中斷是此位低時(shí)禁用。該位通過(guò)重置清除。VMIVME-7807自動(dòng)化卡件位4當(dāng)該位較

VMIVME-7807自動(dòng)化卡件,GE使用方法教程

位設(shè)置和清除指令不應(yīng)用于此控制寄存器。因?yàn)橹袛啾粚?寫(xiě)入狀態(tài)位,狀態(tài)位為1至指示掛起的中斷,讀-修改-寫(xiě)序列可能清除掛起的中斷。這些位對(duì)滴答定時(shí)器生成的中斷電平進(jìn)行編程。這些位編程打印機(jī)生成的中斷級(jí)別。級(jí)別0不生成中斷。這些位通過(guò)重置。位3當(dāng)該位為高位時(shí),中斷被啟用。中斷是此位低時(shí)禁用。該位通過(guò)重置清除。

VMIVME-7807 VMIVME-7807-411001 350-0001007807-411001 B -3.jpg

VMIVME-7807 VMIVME-7807-411001 350-0001007807-411001 B -2.jpg

VMIVME-7807 VMIVME-7807-411001 350-0001007807-411001 B -1.jpg

VMIVME-7807自動(dòng)化卡件位4當(dāng)該位較低時(shí),ACK*的上升沿生成一個(gè)打斷當(dāng)該位較高時(shí),ACK的下降沿*生成中斷。該位通過(guò)重置清除。位5當(dāng)中斷被啟用時(shí),該位由上升或由第4位選擇的ACK*下降沿。這個(gè)鉆頭是邊緣敏感,通過(guò)向其寫(xiě)入1或在打印機(jī)時(shí)清除中斷被禁用。位6當(dāng)中斷被啟用時(shí),該位由故障*。該位對(duì)邊緣敏感,通過(guò)寫(xiě)入1清除或當(dāng)打印機(jī)中斷被禁用時(shí)。位7當(dāng)該位高時(shí),打印機(jī)中斷在以位0-2編程的電平。該位是位5和的或6、該位通過(guò)復(fù)位清除。由于級(jí)別0不生成中斷,因此該級(jí)別為用于輪詢(xún)軟件。這些位通過(guò)重置清除。位3當(dāng)該位為高位時(shí),中斷被啟用。中斷是此位低時(shí)禁用。該位通過(guò)重置清除。位7當(dāng)該位為高位時(shí),在以位0-2編程的電平。該位是邊緣敏感的,并且當(dāng)中斷發(fā)生時(shí),由計(jì)時(shí)計(jì)時(shí)器執(zhí)行設(shè)置啟用。當(dāng)向其寫(xiě)入1或當(dāng)中斷被禁用。清除后,它將保持清除狀態(tài),直到下一步執(zhí)行。該位通過(guò)重置清除。

Bit set and clear instructions should not be used on this

control register. Because the interrupt is cleared by

writing a 1 to the status bit and the status bit is a 1 to

indicate a pending interrupt, the read-modify-write

sequence may clear a pending interrupt. These bits program the interrupt level the tick timer generates.These bits program the interrupt level the printer generates.

Level 0 does not generate an interrupt. These bits are cleared by

reset.

Bit 3 When this bit is high, the interrupt is enabled. The interrupt is

disabled when this bit is low. This bit is cleared by reset.

Bit 4 When this bit is low, the rising edge of ACK* generates an

interrupt. When this bit is high, the falling edge of ACK*

generates an interrupt. This bit is cleared by reset.

Bit 5 When interrupts are enabled, this bit is set by the rising or

falling edge of ACK* as selected by bit 4. This bit is edge

sensitive and is cleared by writing a 1 to it or when printer

interrupts are disabled.

Bit 6 When interrupts are enabled, this bit is set by the falling edge of

FAULT*. This bit is edge sensitive and is cleared by writing a 1

to it or when printer interrupts are disabled.

Bit 7 When this bit is high, a printer interrupt is being generated at

the level programmed in bits 0-2. This bit is the OR of bits 5 and

6. This bit is cleared by reset. 

Because level 0 does not generate an interrupt, this level is

intended for polling software. These bits are cleared by reset.

Bit 3 When this bit is high, the interrupt is enabled. The interrupt is

disabled when this bit is low. This bit is cleared by reset.

Bit 7 When this bit is high, a tick timer interrupt is being generated at

the level programmed in bits 0-2. This bit is edge sensitive and it

is set by a carry out of the tick timer when interrupts are

enabled. This bit is cleared when a 1 is written to it or when the

interrupt is disabled. When cleared, it remains cleared until the

next carry out. This bit is cleared by reset. 


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